San Jose, CA, Module Five
Designed a new engineering lab to accommodate growth in the SERDES Product Engineering group, 4,000 square-feet in total, built in three phases to prevent productivity losses during current-space renovation. Primary project objectives were doubling bench capacity, improvements in wire management, reduced acoustical noise levels, and improvements in Electrostatic Discharge prevention. Deliverables included facility designs and accompanying CAD files, utility requirements for Power, Networking, Clean Dry Air, and Chilled Coolant loops for chillers that serviced coolant to test fixtures. Additional Details
San Jose, CA, Module Four
Designed a new engineering lab and back-end test lab, 10,000 square-feet in total, for a new domestic site housing the company's Complex Programmable Logic Device Product Line.
Asia-Pac Headquarters, Singapore
Designed Operations and Engineering Lab areas for the new Xilinx headquarters in Singapore. The project consisted of several sub-modules:
- Four Design Engineering Labs
- Shipping and Receiving
- Production Test
- Reliability Engineering Labs
- Quality Assurance
DeHart Consulting was responsible for sizing the warehouse based on production demand forecasts, creating a flexible and modular production areas to accommodate both legacy and developing test platforms, as well as creating lab environments suitable for the development engineering work force. View further details.
San Jose, CA, Module Three
Designed a renovation and expansion of the Reliability and Failure Analysis lab. Operations included Scanning Electron Microscopy, Scanning Acoustical Microscopy, Focused Ion Beam, Real-time X-ray, and Environmental Testing (including 85/85, temperature cycling, thermal shock, operating life test, and highly accelerated stress testing).
San Jose, CA, Module Two
Designed a new engineering lab space for the technology development organization. Operations included wafer probe, reliability testing, and device characterization lab.
San Jose, CA, Module One
Designed a new back-end test area for this fabless semiconductor company, resulting in a 35% increase in test capacity.